The method is now that I graphically enter the converter in LTSPICE. An example is shown in Fig. 1 below.
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* C:\dfwforth\examples\LTSPICE\clbuck_orig.asc R1 0 out 5 C1 out 0 50µ ic=0 Rser=0.05 V1 N002 0 40 L1 N003 out 50µ ic=0 Rser=0.01 D1 0 N003 mid S1 N003 N002 N006 0 mis V2 ramp 0 PULSE(0 5 0 9.9u 50n 50n 10u) B1 N007 0 V=if( V(ramp)>min(max(0,V(err)),6),0,15) tripdt = 10n R2 N005 N004 10k E1 err 0 N001 N004 10000 R4 err N004 10k B4 N001 0 V=1.3 R3 N006 N007 1k C2 N006 0 10p V3 N005 0 PWL(0 0 1.99m 0 2m -2 2.99m -2 3m 0) .model D D .lib C:\PROGRA~1\LTC\LTSPICEIV\lib\cmp\standard.dio .tran 0 1m 1u uic .model mid D(Ron=.1 Roff=1Meg Vfwd=.7) .model mis SW(Ron=.1 Roff=1Meg Vt=5 Vh=0 Vser=.7) .backanno .endFigure 2. Net list of the circuit in Fig. 1
The original netlist is annotated (by hand) with the definitions of the state variables, parameters, and the period and simulation times (Fig. 3).
S" CLBUCK" SET-names
0e 41e STATEVAR V(out) icout
0e 41e STATEVAR I(L1) icl1
2.5e PARAM ref
10e-6 SET-period
CREATE $circuit TEXT{
C1 out 0 50u ic={icout} Rser=0.05
L1 N003 out 50u ic={icl1} Rser=0.01
C2 N006 0 10p
R1 0 out 5
R2 0 N004 10k
R3 N006 N008 1k
R4 err N004 10k
D1 0 N003 mid
S1 N003 N002 N006 0 mis
V1 N002 0 40
V2 ramp 0 PULSE(0 5 0 {period-100n} 50n 50n {period})
B1 N008 0 V=if( V(ramp)>min(max(0,V(err)),6),0,15) tripdt = 10n
B2 N005 0 V=V(out)*0.2 tripdt = 10n
E1 err 0 N001 N004 10000
B4 N001 0 V = {ref}
.lib C:\PROGRA~1\LTC\LTSPICEIV\lib\cmp\standard.dio
.model D D
.model mid D(Ron=.1 Roff=1Meg Vfwd=.7)
.model mis SW(Ron=.1 Roff=1Meg Vt=5 Vh=0 Vser=.7)
.tran 0 {simtime} 0.1u uic
.backanno
.end
}
Figure 3. Annotated netlist for the simple buck converter, derived from Fig. 2
A small Forth program has been written that uses the modified .net file and LTSPICE to find the steady-state of the SMPS (application of automatic numerical differentiation to find the Jacobian). Up to now, this procedure has been able to find the steady-state of all the circuits I tried it on (all examples provided by Messrs. Duarte, Maksimovic and Ben-Yaakov). A critical addition to the standard procedure is a range-check on the predicted state variables. If out-of-range values are found (like a bus voltage of -100 V), the Jacobian is rejected and brute-force steps (currently 100 cycles) are done with LTSPICE. The maximum range of a state-variable is conveniently specified in the annotated .net files (Fig. 3).
After the Jacobian is found, a state-space system object (F0, G0, H0, K0, Ts) is constructed and passed to Matlab. It is then trivial to use Matlab's PLACE procedure (control toolbox) to find a gain matrix that allows to place the converter poles at exactly the wanted position -- the state-feedback approach [2]. A dump of the session is shown in Fig. 4 below.
FORTH> 0.8e p{ ref } DF! FSTEPS
NORM of Jacobian = 1.109913e0
xk = V(out1) = 0.000000 I(L1) = 0.000000
xk+1 = V(out1) = 11.535084 I(L1) = 1.471632
NORM of Jacobian = 1.038130e0
xk = V(out1) = 11.535084 I(L1) = 1.471632
xk+1 = V(out1) = 11.774778 I(L1) = 1.497710 ok
FORTH> ALL-TF V(out1) TF .SS-INFO
** CIRCUIT CLBUCK.net **
output = V(out1)
input #0 = ref
x[k+1] = F0 * x[k] + G0 * q[k]
v[k] = H0 * x[k] + K0 * q[k]
F0 = [ 9.42e-001 1.90e-001
-1.90e-001 9.50e-001 ];
G0 = [ 4.31e-001
3.03e+000 ];
H0 = [ 1.00e+000 0.00e+000 ];
K0 = [ 0.00e+000 ];
Zero/pole/gain:
0.43097 (z+0.3853)
----------------------
(z^2 - 1.892z + 0.931)
Sampling time: 1e-005
system_poles =
0.9460 + 0.1898i
0.9460 - 0.1898i
ok
FORTH> clp{ }print
( 9.460306e-001 1.897835e-001 )
( 9.460306e-001 -1.897835e-001 ) ok
FORTH> 0.7e 0.1e 0.7e -0.1e clp{ #=> CLP-PLACE
system_poles =
0.9460 + 0.1898i
0.9460 - 0.1898i
Requested poles:
( 7.000000e-001 1.000000e-001 )
( 7.000000e-001 -1.000000e-001 )
ok
FORTH> Ks{ }print
7.875610e-002 1.511449e-001 ok
FORTH> Nv{ }print
-3.011237e+000 ok
Figure 4. Console output of the Forth design script interacting with Matlab. The final results are the gain matrix Ks and normalized gain Nv.
Of course the shown procedure is only possible if the system is 'controllable', but again, up to now I have not encountered uncontrollable systems (popularly speaking: a system having a state that is not influenced by a parameter the feedback can set).
Some engineering insight--'black magic'--still has to be applied because PLACE allows to really place the closed-loop poles anywhere. For now I have had good results with trying to damp the open-loop poles and not moving their 'frequency' too radically (increasing the bandwidth or the gain of the circuit to unreasonable values). For this, it is enough to check and compare the original STEP(sys) in Fig. 5
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It is possible to use the gain matrix Ks and normalized gain vector Nv (output by PLACE) almost directly in LTSPICE. A nicety of LTSPICE is that it has behavioral sample & hold blocks. This means that the feedback design can be kept in the z-domain without any extra conversion to and from the s-domain. The updated schematic with the state-space controller in shown in Figure 7.
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You may notice that the expression for B4 in Fig. 7 is V=3.011*V(ref)-(0.07875610*V(vz)+0.1511339*V(iz)); which is a direct conversion of PLACE's Ks = [7.875610e-002 1.511449e-001]; Nv = -3.011237e+000.
Of course this is still a small-signal approach, and the controller may be inaccurate or wrong when the circuit has a steady-state very different from the one assumed in building the original F0,G0,H0,K0,Ts system. This can be seen in Fig. 8, where I made the output voltage of the SMPS very low. You will notice that the fall-time of the output voltage becomes tediously slow (which was not predicted) because the power switch can only be used to charge the output capacitor, not to discharge it. Of course you will also note that the current goes discontinuous during the step, clearly violating the small-signal presumptions. However, in this case it doesn't seem to be a problem.
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